29. 4. 2020 17:00 - 18:00 SELČ online webinář
Enormous growth in connected devices, autonomous vehicle technologies, cloud services and ever popular social media applications contribute to an exponential increase in the amount of data we produce every day. As a result, huge amounts of data need to be processed and analyzed in today’s SoCs to make meaningful, and at times mission-critical decisions. SerDes – Serializer/Deserializer is the critical component to enable these huge on-chip and off-chip data transfers in today’s SoCs. High-speed SerDes play a critical role in moving data between compute and memory within datacenters and automobile systems. New protocol standards, high data rates and bandwidth requirements make design and verification of SerDes a very challenging task.
What You Will Learn:
- How to achieve accurate Silicon and Simulation correlation on SerDes with Mentor AFS
- How to speed-up long post-layout simulations
- How to address SerDes mixed signal verification with Mentor Symphony
- How to perform variation-aware design and verification of SerDes with Mentor Solido Variation Designer
Na tento online seminář se můžete registrovat také přímo ze stránek společnosti Mentor.